1. Field of the Invention
This invention relates to integrated circuits, and more particularly, to phase detectors implemented as integrated circuits.
2. Description of the Related Art
The basic operation of a Phase/Frequency Detector (PFD) is to compare an received signal to a reference signal and generate an output that is indicative of the difference in phase between the two input signals. A common application for a PFD is in Phase-Locked Loop (PLL) circuits. PLLs are commonly used in clock-recovery circuits for data receivers/decoders.
A typical PFD provides two output pulse streams referred to as UP and DOWN. When the feedback signal (FB) lags the reference signal (REF), the duty cycle of the UP pulse stream will be proportional to the phase difference between REF and FB, while the duty cycle of the DOWN pulse stream will be minimal. Conversely, when FB leads REF, the duty cycle of the UP pulse stream will be minimal and the duty cycle of the DOWN pulse stream will be proportional to the phase difference between FB and REF. When the UP and DOWN pulse streams are integrated and subtracted, the result is an output signal whose amplitude is proportional to the phase difference between the two input signals.
In a typical PLL, the UP and DOWN pulse streams are applied to low-pass filter RC networks containing significant capacitance to ground in order to achieve the integration function. Subsequently the two integrated signals are applied to a differential amplifier whose output amplitude corresponds to the phase difference between FB and REF. This error signal is then input to a Voltage-Controlled Oscillator (VCO) to control the frequency of its output signal. The output frequency of the VCO is proportional to the amplitude of the input signal.
The output of the VCO is typically a signal whose frequency is some multiple of the frequency of the reference signal, and therefore a frequency divider is included after the VCO to produce the FB signal at the proper frequency. When the PLL is xe2x80x9clockedxe2x80x9d, the output of the low-pass filter stage (input to the VCO) should be a constant voltage.
Various embodiments of a method and apparatus for detecting a phase relationship between input periodic waveforms are disclosed. In one embodiment, two cyclic waveforms whose phase relationship is to be measured may be input to a control signal generator. The control signal generator may output a first control signal corresponding to the first cyclic waveform such that the control signal is de-asserted at a specific point with respect to the first cyclic waveform. For example, the control signal may be de-asserted corresponding to the rising edge of the first cyclic waveform.
The control signal generator may also output a second control signal corresponding to the second cyclic waveform such that the control signal is asserted at a specific point with respect to the second cyclic waveform. For example, the control signal may be asserted corresponding to the falling edge of the second cyclic waveform.
The first and second control signals may be applied to and control the function of a switch. The switch may be coupled between the output of a current source and a capacitor so as to control the charging of the capacitor by current from the current source.
The de-assertion of the first control signal may close the switch and allow current from the current source to charge the capacitor. The value of current flowing into the capacitor may be constant and therefore, the charge on the capacitor may increase linearly with time while the switch is closed. The assertion of the second control signal may open the switch cutting off the flow of current to the capacitor. With the capacitor isolated from the current source, the charge on the capacitor and therefore the voltage across the capacitor may remain constant with respect to time. The constant value of the voltage across the capacitor after the opening of the switch may represent a phase relationship between the first and second input cyclic waveforms.
In some embodiments, the phase detector may be implemented as part of an integrated circuit using, for example, CMOS technology. In such embodiments, one terminal of the capacitor may be coupled through one pole of a switch to a current source, while the other terminal of the capacitor is coupled through a second pole of the switch to a current sink. When the switch is open, the capacitor may be isolated from both voltage rails and the voltage across the capacitor may be output as a differential signal.
A discharge switch may be coupled between the first and second terminals of the capacitor. When the discharge switch is closed in response to the assertion of the first control signal, the charge on the capacitor may rapidly dissipate through the switch. The capacitor may be discharged in preparation for making a subsequent measurement of the phase relationship between the input cyclic waveforms.
An output switch including two poles may be coupled between the terminals of the capacitor and the output terminals of the phase detector. The output switch may be controlled by the first and second control signals such that the assertion of the second control signal causes the output switch to close, thereby outputting the constant, isolated voltage across the capacitor. The output switch may open in response to the assertion of the first control signal prior to the discharge of the capacitor at the end of the current phase measurement cycle.
The phase detector may be used to implement a phase-locked loop in order to generate an output signal whose frequency is some multiple of the frequency of first cyclic waveform and whose phase has a constant relationship with the fist cyclic waveform. In such implementations, the output of the phase detector may be used to control a VCO such that the second cyclic waveform, which may be a derivative of the VCO""s output, is synchronized with the first cyclic waveform.